programmable logic
Red grape detection with accelerated artificial neural networks in the FPGA's programmable logic
Magalhães, Sandro Costa, Almeida, Marco, Santos, Filipe Neves dos, Moreira, António Paulo, Dias, Jorge
Robots usually slow down for canning to detect objects while moving. Additionally, the robot's camera is configured with a low framerate to track the velocity of the detection algorithms. This would be constrained while executing tasks and exploring, making robots increase the task execution time. AMD has developed the Vitis-AI framework to deploy detection algorithms into FPGAs. However, this tool does not fully use the FPGAs' PL. In this work, we use the FINN architecture to deploy three ANNs, MobileNet v1 with 4-bit quantisation, CNV with 2-bit quantisation, and CNV with 1-bit quantisation (BNN), inside an FPGA's PL. The models were trained on the RG2C dataset. This is a self-acquired dataset released in open access. MobileNet v1 performed better, reaching a success rate of 98 % and an inference speed of 6611 FPS. In this work, we proved that we can use FPGAs to speed up ANNs and make them suitable for attention mechanisms.
Adaptive compute acceleration platform for PCIe
Based around the Xilinx Versal AI Core series, the ADM-PA100 offers fully customizable IO and meets requirements for a range of markets including data center, machine learning, HPC, scientific instrumentation, and test and measurement. The Versal AI Core series includes an array of Xilinx AI engines (dedicated VLIW processors, capable of vector math processing at compute densities 5x higher than programmable logic), closely coupled with programmable logic allowing highly efficient implementation of custom coprocessing operations in this data flow. The Xilinx Versal series of devices also feature an on-chip programmable network on chip (NoC) that improves on-chip programmable logic routing in large designs), dedicated hardened IP for multi-rate 100G Ethernet, hardened PCIe Gen4 endpoints with DMA outside the programmable logic, hardened DDR4 memory controllers, built in ARM A72 and R5F CPUs, and programmable logic and DSP performance a generation on from UltraScale devices, says the company. Manuel Uhm, director of Silicon Marketing at Xilinx says, "The hardware adaptability and heterogeneous architecture of Versal AI Core ACAPs are a key advantage over traditional accelerators that typically focus on a subset of applications. This enables the creation of multiple domain specific architectures targeted to specific workloads. We're delighted that Alpha Data has chosen Versal AI Core series for its ADM-PA100 board to accelerate a breadth of workloads in cloud, networking, and edge markets."
Companies Clash over AI at the Edge
In the past two years, artificial intelligence has morphed from academic marvel to global megatrend. Machine learning in some form is set to revolutionize almost everything -- consumer, automotive, industrial, every area of electronics -- and, beyond that, to affect society and our lives in ways we don't yet know about. What this means for the industry is that practically every processor vendor has identified machine learning as a goose that will lay golden eggs. The race is on to position one's own approach as the right solution to accelerate specific workloads in the area that holds the most potential: machine learning outside the data center, or AI at the edge. AI at the edge holds so much promise because it can be applied to practically every electronic device, from self-driving vehicles that see pedestrians in the road to coffee makers that respond to voice commands.